发明名称 |
STABILIZED DIGITAL PLL USING A SECONDARY PLL |
摘要 |
As used in a digital television receiver, the invention is associated with a first phase locked loop which develops a sampling clock signal that is locked to the horizontal line synchronizing signal components of a composite video signal. A second digital phase locked loop is clocked by the sampling clock signal and develops a digital signal that is phase locked to the color burst signal. This digital signal is used as a regenerated color subcarrier signal to synchronously demodulate the chrominance components of the composite video signals into I and Q color difference signals. To compensate for frequency instability in the regenerated subcarrier signal caused by frequency instabilities in the line-locked clock signal, a third digital phase locked loop (300) develops an output signal which is phase locked to a reference signal generated by a crystal controlled oscillator (310). Control signals (C') from the third phase locked loop are applied (328) to the second phase locked loop to substantially compensate for frequency instabilities in the regenerated subcarrier signal that are induced by the clock signals. |
申请公布号 |
AU7051487(A) |
申请公布日期 |
1987.10.01 |
申请号 |
AU19870070514 |
申请日期 |
1987.03.23 |
申请人 |
RCA CORP. |
发明人 |
WALTER HEINRICH DEMMER;LEOPOLD ALBERT HARWOOD;CHANDRAKANT BHAILALBHAI PATEL;ALVIN REUBEN BALABAN |
分类号 |
H03L7/06;H03L7/087;H03L7/099;H03L7/22;H04N9/45 |
主分类号 |
H03L7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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