| 发明名称 |
Method of forming doped wells in integrated circuits and its use in the production of a bipolar transistor in such circuits. |
| 摘要 |
<p>A well structure for a semiconductor device has a dopant profile such that the maximum net dopant level is below the device surface. This is achieved by a two stage doping with materials of opposite conductivity type.</p> |
| 申请公布号 |
EP0239217(A2) |
申请公布日期 |
1987.09.30 |
| 申请号 |
EP19870301239 |
申请日期 |
1987.02.13 |
| 申请人 |
STC PLC |
发明人 |
HUNT, ROWLAND GEOFFREY |
| 分类号 |
H01L29/73;H01L21/331;H01L21/74 |
主分类号 |
H01L29/73 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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