| 摘要 |
PURPOSE:To miniaturize at low cost by simply constituting a delaying circuit part in the device to demodulate the modulating data basing on a DPSK system with a delaying detecting system. CONSTITUTION:A signal Ps having beat signal frequencies f1-f2 between a modulated signal Pm having the essentially same frequency f1 as a carrier with a comparatively high frequency and the second signal having a frequency f2 different from the f1 is generated in a beating generating means 50. Concerning the Ps, the previous data are demodulated by detecting the change of phase. The change of phase is detected by delaying the time corresponding to one-bit time length of binary data to the signal Ps of beat frequencies f1-f2 lower than the frequency f1 of the modulated signal Pm by a delaying means 60 and detecting the phase relation between the signal to receive the delay and the signal not to receive the delay by a demodulating means 70. For such a reason, the delay means 60 can be simply constituted. |
