发明名称 |
INDIRECT ACCESS CONTROL SYSTEM |
摘要 |
<p>PURPOSE:To access indirectly registers for many times in a short time by adding an automatic updating mechanism to an indirect address register of a subprocessor group when a main processor accesses a subprocessor. CONSTITUTION:When a main processor 1 accesses a subprocessor 2 through a common bus 3, an automatic updating mechanism 2-6 counts up an indirect address to update it and outputs the set clock of an indirect data (iDD) register 2-5 by the access to the iDD register 2-5. The automatic updating mechanism 2-6 counts up automatically the indirect address after the indirect address is set to the mechanism 2-6 once, and continuous access is performed with one indirect address setting.</p> |
申请公布号 |
JPS62211767(A) |
申请公布日期 |
1987.09.17 |
申请号 |
JP19860055303 |
申请日期 |
1986.03.12 |
申请人 |
FUJITSU LTD |
发明人 |
NONOMURA KAZUYASU;MURATA TAKESHI;NODA TAKAHITO;KAMISAKA YUJI;ABO KENICHI;TAKEI MASAYOSHI;NISHIMACHI RIYOUICHI;SAKURAI YASUTOMO |
分类号 |
G06F12/02;G06F12/00;G06F12/06;G06F15/16;G06F15/17 |
主分类号 |
G06F12/02 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|