发明名称 |
Frequency divider circuit |
摘要 |
A divider-by-factor frequency divider circuit is described. The rate-multiplier principle of eliminating pulses as regularly as possible from a number of pulses of the signal to be frequency-divided is modified so that low-frequency variations in the frequency-divided signal are reduced at the expense of an increase in higher-frequency variations. This modification is achieved through the addition of a second accumulator, a pair of adders, a subtracter and a presettable counter to the accumulator of a frequency divider circuit. A rate multiplier with a coloring characteristic inverse to pink noise is thereby obtained.
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申请公布号 |
US4694475(A) |
申请公布日期 |
1987.09.15 |
申请号 |
US19860861152 |
申请日期 |
1986.05.08 |
申请人 |
DEUTSCHE ITT INDUSTRIES GMBH |
发明人 |
MEHRGARDT, SOENKE |
分类号 |
H03K23/66;G06F7/68;H03L7/197;(IPC1-7):H03K21/02 |
主分类号 |
H03K23/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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