Semiconductor memory device with increased adaptability

摘要

A semiconductor memory device having a PROM with an output register has an initialize input terminal and a programmable initial data memory cell for each bit. When an initialize input signal is supplied to the initialize input terminal, the output register is cleared or present in accordance with the content of the initial data memory cell, whereby the reduction of adaptability caused by a decrease in input terminals can be prevented, a circuit arrangement can be simplified, and a high degree of integration and high-speed operation can be achieved.