| 摘要 |
PURPOSE:To realize two timer functions by a few hardwares by providing two timer registers holding independently timer information respectively and using a circuit means such as +1 addition in time division between two timers in common. CONSTITUTION:The 1st timer register 11 and the 2nd timer register 12 are registers holding two counts required to realize the 1st and 2nd two independent timer functions and connected in a loop via a processing circuit 13. Each timer information is transferred cyclicly from the 1st timer register 11 to the 2nd timer register 12 and vice versa via a processing circuit 13 at a period T/2 being a half of the clock period T in the loop. In this case, the information is subject to +1 addition or no addition by the processing circuit 13. Thus, the processing circuit 13 is operated in time division and the first half and the latter half period of each clock period are assigned to the 1st timer and the 2nd timer.
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