| 摘要 |
PURPOSE:To reduce the power consumption without function degradation and to decrease the temperature rise of elements by operating a logic circuit having a property whose power consumption tends to increase due to the increase in the operating frequency at the standby of the titled equipment while the clock frequency is being decreased. CONSTITUTION:A flip-flop 5 is reset at the standby state and an output Q is in the off-state. A selector 4 gives a signal being 1/10 frequency division of a clock signal generated at a clock signal generator 2 by a frequency divider 3 to an output terminal Z at the standby state. Since the processing speed is decreased also in this state, whether or not the transition to the operating state takes place is to be supervised. The contact information of a switch or a keyboard is given to a main control circuit 1 and when the flip-flop 5 is set, the main control circuit 1 transits to the operation by using a clock signal having a high frequency for the normal operation.
|
