发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To increase the integration density as a whole by a method wherein a plurality of low voltage circuit elements are collectively formed in a dielectric isolation island, when a high withstand voltage circuit element and the low voltage one are provided in a semiconductor substrate. CONSTITUTION:An n type Si island 37 for the high withstand voltage circuit element and an n type Si land 38 for the low withstand voltage one are formed in a supporter 43 via isolation oxide films 39 and 40, respectively; an n<+> type region 33 and a p type region 34 are formed in the island 37 by impurity diffusion from apertures provided in a surface oxide film 30, and further an n<+> type region is provided in the region 34. The island region 38 is put in the n-p-n three- layer structure of the region 38, a p type region 41, and n type regions 44 and 45 sandwiching a p type region 42, and an n<+> type region 32 and a p type region 31 are diffusion-formed in one region 44 p-n-isolated by means of the region 42, an n<+> type region being then provided in the region 31. Likewise, a p type region and n<+> type region 35 and 36 are provided in the other region 45, and all the low voltage circuit elements are contained in the Si island 38. In such a manner, the integration degree of the IC is increased.
申请公布号 JPS6042844(A) 申请公布日期 1985.03.07
申请号 JP19830150762 申请日期 1983.08.18
申请人 NIPPON DENKI KK 发明人 MUKAI KANJI;TAKEUCHI TOKUO
分类号 H01L21/8222;H01L21/762;H01L27/082 主分类号 H01L21/8222
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