发明名称 AMPLIFYING CIRCUIT
摘要 PURPOSE:To manufacture a wide-band amplifying circuit which does not deteriorate in output VSWR even during gain control by fixing the gate bias of a trailing-stage FET and varying the gate bias of an initial-stage FET from outside. CONSTITUTION:The gate bias of the GaAg FET 2 of a negative feedback wide- band amplifying circuit as the 2nd stage is fixed to VGS=0V by interposing a bias resistance 6 between the gate and source of the FET. The gate bias of a GaAs FET 1 as the initial stage, on the other hand, is allowed to be supplied freely from out side through the gate bias resistance 6 and then the bias is made variable. Further, the feedback capacitor of the 2nd stage is used as an interstage coupling capacitor. Thus, the gain control is performed with the gate bias of the 2nd-stage FET, so the output VSWR never deteriorates even during the gain control.
申请公布号 JPS62190910(A) 申请公布日期 1987.08.21
申请号 JP19860034598 申请日期 1986.02.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NISHIUMA MASAHIRO;HAMANA TETSUYA;HAGIO MASAHIRO;KAZUMURA MASARU
分类号 H03G3/10;H03G3/12 主分类号 H03G3/10
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