| 摘要 |
<p>An active differential load circuit (50) which receives a differential input signal applied to first and second inputs thereof and produces a single ended output signal at an output (66) thereof while unwanted higher frequency signals applied thereto are filtered from the output without ground currents. The load includes a pair of transistors (16, 18) which have, in the preferred embodiment, their collectors connected together via series connected first and second resistors (22, 24) with the interconnection between the two resistors being connected to the bases of the two transistors. The collectors are also respectively coupled to a pair of current source (60, 62) and the respective emitters receiving the applied differential input signal. A filter capacitor (26) is coupled between the collectors of the two transistors and effectively shorts the unwanted higher frequency signals thereacross.</p> |
