发明名称 INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain an IGFET in which gm can be set largely by forming the connecting direction of source and drain electrodes perpendicularly or parallel to source and drain rows disposed alternately to increase the thickness of the electrodes. CONSTITUTION:N<+> type sources 12 and drains 13 are alternately laterally and longitudinally arranged on a P-type Si substrate 11, source electrodes 14, drain electrodes 15 are disposed at every other positions in parallel with the row A of the layers 12, 13. The electrodes 14 are connected via holes 16a, 16b,... with sources 12a, 12b,..., projected to the left side in the holes 16a, and projected to the right side in the holes 16b, and thus repeated in the uneven state. The electrodes 15 are similarly repeated in the uneven state. Polysilicon gate electrodes 17 are so formed as to surround the sources 12 and the drains 13, and connected through holes 19 with signal lines. In this case, d'<(2-2<1/2>)2.g+d is set, where d is the interval of the source or drain electrodes, d' is the maxi mum interval, and g is the pitch of the gate pattern. According to the configura tion, gm of IGFET can be increased as compared with the conventional transis tor.
申请公布号 JPS62185373(A) 申请公布日期 1987.08.13
申请号 JP19860027431 申请日期 1986.02.10
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 KINUGASA MASANORI;TANAKA NORISHIGE;MOBARA HIROSHI;OOTA HIROKATA
分类号 H01L29/78;H01L23/528;H01L27/118;H01L29/417;H01L29/423;H01L29/94 主分类号 H01L29/78
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