| 摘要 |
PURPOSE:To obtain a semiconductor memory with a sense circuit suitable for high integration by dividing a common sense line into plural parts so as to connect a multiemitter Tr, whose load is connected to a collector, to each emitter. CONSTITUTION:The common sense line is bisected to a group comprised of parts 106 and 108 and that of parts 107 and 109. They are connected to the emitters of multiemitters Tr118 and Tr119 whose load resistances 116 and 117 are connected to the collector. If a memory cell in a memory cell array 101 connected to bit lines 102 and 103 is selected, a read current is conducted from either one of read transistors Tr104 and Tr105, for instance, Tr104, to only the line 106 among the common sense lines 106-109. A sense output S becomes a high potential, whereas the inverse of S becomes a low potential. The potential between the S and its inverse is amplified by a next-staged output circuit, whereby a data output can be obtained.
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