| 摘要 |
PURPOSE:To improve error correction ability without modifying hardware and software in a decoding device by writing data on two correct code blocks in a common memory, reducing an error and executing correction processing. CONSTITUTION:The reproduction signal of an input terminal 11P is supplied to a digital demodulation circuit 13 through a reproduction amplifier 12, and its output signal is supplied to a CRC arithmetic circuit 14 to detect an error. Reproduction data and the result that the CRC detects an error are written in RAMs 15 and 16. In that case all CRC pointers assume to have errors. The moment the CRC pointer involved in the data decided to be correct is cleared, correct data is written. The reproduction data written in the RAMs 15 and 16 is read out in a next field, and a correction circuit 17 processes the error, and takes out the result on an output terminal 18.
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