Method and circuit arrangement for monitoring a processor system

摘要

The invention concerns a method for monitoring a processor system which is in an undefined operating state, in which the processor which has gone out of normal operation is reset by a reset pulse into a correct operating state, and in which the processor periodically polls a monitoring circuit (watchdog), which generates the reset pulse if the processor does not poll it within a preset time. The distinguishing feature is that the reset pulse is also generated if the processor accesses a forbidden address, which is in a range which is outside the address range which is used by the processor program.