发明名称 CMOS CIRCUIT
摘要 PURPOSE:To provide a hysteresis characteristic by connecting a C-MOSFET between the positive side and the negative side of a power source and setting threshold voltages of FETs so that the sum of them satisfies prescribed relations. CONSTITUTION:The C-MOSFET is connected between power sources VDD and VSS, and a threshold voltage VTP of a PMOSFET, a threshold voltage VTN of an NMOSFET, and a supply voltage (VDD-VSS) are set to satify relations of a formula. When an input voltage is 0-1.2V in case of the increase from 0V to 3V, a voltage higher than the threshold VTP>=-1.8V of a P-MOS 1 is applied between the gate and the source to turn on the P-MOS 1, and a load capacity CL is charged to 3V(=VDD), and the output is 3V. When the input voltage is 1.2-1.8V, both FETs are turned off and the output is held at 3V by the capacity CL; and when the input voltage is 1.8-3V, an N-MOS 2 is turned on and the output is 0V. When the input voltage is 3-1.2V in case of the fall, the output is 0V; and when the input voltage is 1.2-0V, the output is 3V. Thus, a hysteresis is provided to the input/output transmission characteristic.
申请公布号 JPS62173817(A) 申请公布日期 1987.07.30
申请号 JP19860015461 申请日期 1986.01.27
申请人 NEC CORP 发明人 NAGARA SHIGENORI
分类号 H01L27/092;H01L21/8238;H01L27/08;H03K3/023;H03K3/0233;H03K19/094;H03K19/0944 主分类号 H01L27/092
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