| 摘要 |
PURPOSE:To attain stable data transmission while the transmission distortion is eliminated independently of number of connection terminal equipments by providing a means recovering and relaying a reception pulse train at each bit. CONSTITUTION:In applying the titled circuit to the start-stop synchronization data transmission, a reception data of a line receiver 10 is fed to a synchronizing circuit comprising a start bit detection circuit 13 and a character bit counter 16 via reception gates 11, 12 to detect an effective start bit and to generate a synchronizing signal synchronously with the reception data, and a reception data sampling clock generating circuit 15 and a built-in counter of the character bit counter 16 are reset by a reset pulse outputted from a built-in AND circuit of the circuit 15. The reception data sampling clock generation circuit 15 generates the sampling clock synchronously with the reception data, the clock is fed to a bit regenerative circuit 14 to reproduce the reception data at each bit and its output is fed to an own terminal transmission/reception processing section 27 via a reception gate 26 and sent to an outgoing side via the line driver 17.
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