发明名称 PLL CIRCUIT
摘要 PURPOSE:To stabilize the oscillation frequency or output signal of a voltage- controlled oscillator and to improve follow-up characteristics by providing a phase comparator, a voltage converting means, a low-pass filter, the voltage- controlled oscillator VCO, and forming the closed loop of a PLL so that the output signal of the VCO is locked to the input signal. CONSTITUTION:Voltage level converters 34 and 36 convert output voltages Q1 and Q2 of flip-flops F.Fs 26 and 30 composed of TTL to voltage levels of -12 and +12V when the output voltages Q1 and Q2 reach about 5V as one level. The low-pass filter 42 smoothes said pulsative voltage from the voltage level converters 34 and 36 to generate an AC control voltage Ef, which is supplied to the voltage-controlled oscillator VCO 44. The VCO 44 has normal constitution and generates a center frequency of when the control voltage Ef is at 0V. Therefore, the need for an offset voltage for setting the center frequency of the VCO is eliminated and the output of the VCO which is stable and superior in follow-up characteristics is obtained.
申请公布号 JPS62171320(A) 申请公布日期 1987.07.28
申请号 JP19860012016 申请日期 1986.01.24
申请人 NEC HOME ELECTRONICS LTD 发明人 SAMEJIMA TAKASHI
分类号 H03L7/093;H03L7/06 主分类号 H03L7/093
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