| 摘要 |
PURPOSE:To reduce the number of gates in a logic circuit required for arithmetic processing and to speed-up the processing by storing data subjected to conversion operation in a storage means storing arithmetic data at the time of executing binarization decimal operations. CONSTITUTION:At the time of executing binarization decimal operations, a selection signal 103 with respect to selectors 4A and 4B comes to a low level, and the selectors 4A and 4B execute selection actions so that they can output the output data of data conversion means 3A and 3B in the data storage means 5A and 5B. Data obtained by adding three to the binarization decimal input data 101A and 101B are stored in said means 5A and 5B. An arithmetic means 2 adds and subtracts said data according to the instructions of an arithmetic mode specification means 1. For addition, three is added to two groups of the input data, which turns out to be a value added with six, and accordingly carry can be made smoothly. On the other hand, subtraction never affects the arithmetic result. If the signal 109 of the means 1 specifies addition, a correction means 6 subtracts six from the digit which is not carried.
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