| 摘要 |
PURPOSE:To reduce the number of memories in use by setting an address value for error processing information sent from an error processing address sending means to an address counter means so as to set error processing signal information to a processing control circuit. CONSTITUTION:When an instruction from a DKC 1 is detected by a tag decoder circuit 20, the instruction is informed to a sequencer control circuit 21 through a signal line (c), information (2) of bus-out is stored in a bus-out register 22 through a signal line (d) and the information sent from the bus-out register 22 is set to an address counter 24 through signals lines (e), (f). When any error is identified in this case, an MPX 27 sends the information from an error processing address section 29 to the address counter 24, where the information is set. A memory 25' accesses an address sent from the address counter 24, sets the error processing information stored therein to a processing control circuit 26 and informed to the DKC 1 through a signal line (a). Thus, number of memories in use is decreased and an inexpensive and highly reliable sequencer circuit is obtained.
|
