发明名称 NOISE REDUCTION CIRCUIT
摘要 PURPOSE:To set the levels of an input video signal and on output video signal from a one-H delay circuit equal to each other by comparing said two levels with each other, and varying the level of the latter output video signal in accordance with the result of the comparison. CONSTITUTION:The input video signal from an input terminal 1 is supplied to subtractors 3 and 6, delayed in the 1-H delay circuit 2, then supplied to the subtractor 3 via an AGC amplifier 11. Also the video signal is level-detected by a level detector 8, and is level-detected by a level detector 9 in an error detector 10. The output signal of the error detector 10 is supplied to the AGC amplifier 11 as a gain control signal. Accordingly, the level of the output signal of the amplifier 11 and that of the video signal from the input terminal 1 are coincident with each other. Therefore, the levels of the two video signals supplied to the subtractor 3 are coincident with each other, and hence S/N is sufficiently improved.
申请公布号 JPS62168484(A) 申请公布日期 1987.07.24
申请号 JP19860008975 申请日期 1986.01.21
申请人 HITACHI LTD 发明人 OKADA YOSHINORI;MITSUHAYASHI TOSHISUKE;YONEYAMA HISAKATSU
分类号 H04N5/21;H04N5/93 主分类号 H04N5/21
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