发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To prevent an output buffer circuit from the generation of latch-up by connecting a resistor element and a p-channel MOSFET formed on an n-type well area between the coupling node of a pair of n-channel MOSFETs connected in series and coupled with an external terminal and a power supply terminal. CONSTITUTION:The output buffer circuit BO has amplification stages constituted of two connected complementary MOS(CMOS) inverter circuits I1, I2 consisting of a p-channel MOSFET Q1 and an n-channel MOSFET Q2 and one CMOS inverter circuit I3 having similar constitution to said circuits I1, I2. The output stage is connected by n-channel MOSFET Q3, Q4 connected to an I/O terminal I/O. The resistor element R and the p-channel MOSFET Q5 formed in the n-type well area are connected between the coupling node N of the FETs Q3, Q4 and the power supply terminal VCC to prevent the generation of latch-up for making abnormal current flow into the power supply terminal and the connection terminal.
申请公布号 JPS62165426(A) 申请公布日期 1987.07.22
申请号 JP19860006472 申请日期 1986.01.17
申请人 HITACHI MICRO COMPUT ENG LTD;HITACHI LTD 发明人 HARADA KENICHI;WADA TSUTOMU;FURUNO TAKESHI
分类号 H01L27/04;H01L21/822;H01L21/8234;H01L21/8247;H01L27/08;H01L27/088;H01L29/788;H01L29/792;H03K5/01;H03K5/02;H03K17/08;H03K17/687;H03K19/003;H03K19/0948 主分类号 H01L27/04
代理机构 代理人
主权项
地址