| 摘要 |
PURPOSE:To detect and correct the error of data by applying a P signal to the data to be transferred and transferring a PC signal from a microcomputer for data control to an IC for CRT displaying control. CONSTITUTION:Parallel input data 2 are fetched into an input R4 and outputted as parallel data 5 when a parity inspecting (PC) signal 17 is 'H'. A parity generating (P) circuit 13 outputs a parity (P) signal 14 as 'H' when the number of 'H' in the parallel data 5 is an odd number and outputs the signal as 'L' when the number is an even number. A PS circuit 6 serially converts the parallel data 5 and a P signal 14 based on a clock signal 3 and outputs as serial data 7. An SP circuit 9 parallelly converts the serial data 7 based on the clock signal 3 and outputs as parallel data 10 and a P signal 15. A PC circuit 16 outputs the PC signal 17 as 'L' when the number of 'H' in the parallel data 10 and the P signal 15 is an odd number and outputs as 'H' when the number is an even number. The parallel data 10 is fetched into an output R11 when the PC signal 17 is 'H' and outputted as parallel output data 12.
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