| 摘要 |
PURPOSE:To transmit unconditionally the change of an input signal with low power consumption by connecting in common the input/output of the 1st buffer circuit and of the 2nd buffer circuit provided with a means whose output is disconnected from the power supply by a control signal. CONSTITUTION:Since a clocked gate inverter circuit 12 and an inverter circuit 11 are both in the operating state when a clock signal CL is at a high potential, the input signal from an input terminal 13 reaches an output terminal 14 at a high speed. When the level of the clock signal CL is at a low potential, the clocked gate type inverter circuit 12 is disconnected from the power supply and only the inverter circuit 11 remains, then low power consumption is attained and the input signal from the input terminal 13 is sent to the output terminal 14. Thus, the low power input circuit as a whole has a high speed response when the clock signal CL is at a high potential, and a low power consumption when the clock signal CL is at a low potential. |
