| 摘要 |
PURPOSE:To suppress the ripple of a speed detection signal, by a method wherein (2n) pieces of differential outputs and (2n) pieces of reversal differential outputs are obtained from (n)-phase output signals of a three-phase or more and odd number order deflected at a definite phase and having the same amplitude by (n) pieces of differentiation circuits and (n) pieces of reversal circuits and selected around the max. value of said signals within a 360/2 deg.-range to be synthesized. CONSTITUTION:An analogue switch group 30 takes out a 60 deg.-range around the max. value of differential outputs dU<+>, dU<->, dV<+>, dV<->, dW<+>, dW<-> of each phase and an analogue switch control signal pulse generating circuit 40 is constituted so that a comparator 41 takes out a Z-signal from U-phase and W-phase signals and a comparator 42 takes out a Y-signal from V-phase and U-shape signals and a comparator 43 takes out an X-signal from W-phase and V-phase signals. A decoder circuit 50 decodes Z-, Y- and Z-signals to form signals of O1-O6. Analogue switches 31-36 wherein O1 is connected to the output of dU1<+>, O2 to dW<+>, O3 to dV<->, O4 to dv<+>, O5 to dW<-> and O6 to du<-> are selected and controlled. As a result, a DC signal E0 is obtained and a smooth DC speed signal EV is further obtained.
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