发明名称 ELEVATOR CONTROLLER
摘要 PURPOSE:To minimize the effects of troubles with an elevator controller by decentralizing the common memory circuits to plural microcomputers and connecting these memory circuits to a common bus line via buffer circuits. CONSTITUTION:When the 2nd microcomputer 38 has trouble, the trouble detecting signal 24 output from a CPU9 is input to a buffer 23. Thus the buffer 23 is closed to inhibit its use through a common bus 15. At the same time, the access to the common bus 15 from the microcomputer 38 is not possible. As a result, the abnormal data is not input to the 1st microcomputer 31 from the 2nd common memory 21. Furthermore it is avoided that the abnormal data is written to the 1st common memory 17 and the data used by the microcomputer 31 are destroyed.
申请公布号 JPS62163101(A) 申请公布日期 1987.07.18
申请号 JP19860004137 申请日期 1986.01.14
申请人 TOSHIBA CORP 发明人 KOIKE HAJIME
分类号 B66B5/02;B66B1/06;G05B9/02;G06F11/00 主分类号 B66B5/02
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