| 摘要 |
PURPOSE:To attain stable synchronizing state by outputting an edge signal synchronized earlier in leading/trailing edge of a basic clock signal with respect to a rotating position detection signal to a synchronizing frequency division circuit. CONSTITUTION:As the building block, a basic clock signal generating circuit 8, a synchronizing frequency division circuit 9, a laser modulation circuit 10 are provided and each basic clock signal and a rotating position detection signal BD are inputted respectively to a positive synchronizing circuit 11 and a negative synchronizing circuit 12. When a basic clock signal descends just after the signal BD goes to an H level, an output Q of a flip-flop FF 21 goes to an H level, the flip-flop FF 12 is reset and a flip-flop FF 22 acts like a 1/2 frequency division circuit synchronized with the trailing of a basic clock signal. It is inputted to the circuit 9 as the basic clock signal, the result is further frequency-divided and a required modulation signal is obtained. Thus, even high frequency modulation signal is synchronized stably.
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