| 摘要 |
PURPOSE:To inhibit the wrong access from a CPU to a memory by providing a read/write inhibiting register. CONSTITUTION:Before individual application programs are executed by a control program, upper and lower limit addresses of read/write inhibit areas are set to a read inhibiting register 3 and a write inhibiting register 5 by data 9 from a CPU 1 and a write strobe 13. In case the CPU 1 reads data from a memory 2, a read address 10 and a read strobe 12 are outputted. The read address 10 is compared with upper and lower limit addresses of the read inhibit register 3 by a read comparator 4. If the address 10 is within the range of inhibition, a read inhibiting gate 7 is closed by an output 14 of an OR gate 16 to inhibit the access of the memory 2 and an output 11 of an OR gate 18 becomes an interrupt signal to the CPU 1 to inform the CPU 1 of the wrong read. In case of the write to the memory 2, a write address is checked and the write to the memory 2 is inhibited by a write inhibiting gate 8. |
