| 摘要 |
PURPOSE:To decrease the number of connection lines and to reduce the LSI scale by securing the common use of the data lines and address lines with each other between two memories within each comparison unit. CONSTITUTION:The single unit type width data on a comparison unit 40-i is inputted to an input terminal 101. While the single unit byte data of the unit 40-i is outputted from an output terminal 102. The partial set of the arranged data at one side is stored in a memory 103 and that at the other partial set is stored in a memory 104. Both address and data lines are used in common with each other between memories 103 and 104 and a single circuit 105 serve as the reading/writing circuits of both memories 103 and 104. The single data of memories 103 and 104 are stored in registers 106 and 107 respectively and then compared with each other by a comparator 108. Then the data on either one of both memories 103 and 104 is transferred to the terminal 102 via a multiplexer 109.
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