| 摘要 |
PURPOSE:To reduce a delay due to an input protection resistance and a gate capacity of a transistor at an initial stage and thereby to obtain a semiconductor device having a high response speed, by dividing an input bus and by providing an input protection circuit for each divided bus. CONSTITUTION:One external input signal bus is divided into a plurality, and the divided buses are provided with input protection circuits 1 and 1' respectively. While a delay time due to an input protection resistance and a gate capacity of a transistor at an initial stage is proportional to the time constant thereof, the input protection resistance needs to be at a certain value for preventing the electrostatic breakdown of a semiconductor device, and the time constant thereof is determined according to the gate capacity to the transistor at an initial stage. Accordingly, it can be said that the delay time is proportional to the gate capacity of the transistor at the initial stage. When the gate capacities of transistors Q3, Q5 and Q7 are represented by C3, C5 and C7, the delay of phi2 to an input signal phi1 is proportional to C3 and the delay of phi'2 is proportional to C5+C7. Likewise, the delay of phi2 to the input signal phi1 turns to be a small value proportional to C3+C5+C7. |
