发明名称 |
DATA PROCESSING SYSTEM ALLOWING USE OF THE SAME ERASABLE AND PROGRAMMABLE MEMORY FOR BOTH READING AND WRITING INSTRUCTIONS AND DATA |
摘要 |
The data processing system according to the invention has a microprocessor and an external erasable and programmable memory. A logic connection system is arranged between control pins of the microprocessor and a controlled pin of the external memory. These control pins of the microprocessor are the program control pin, a port control pin, the controlled pin of the memory and the memory selection pin. This ligic connection system permits using only one memory both for reading and writing of instructions and/or data instead of the two memories generally used. |
申请公布号 |
DE3276503(D1) |
申请公布日期 |
1987.07.09 |
申请号 |
DE19823276503 |
申请日期 |
1982.11.30 |
申请人 |
S.A. PHILIPS INDUSTRIELLE ET COMMERCIALE;N.V. PHILIPS' GLOEILAMPENFABRIEKEN |
发明人 |
ROBERT, SERGE;FEVRIER, PIERRE |
分类号 |
G06F13/16;G06F15/78;G06Q40/00;G11C16/10;G11C16/32;(IPC1-7):G06F15/06;G11C17/00 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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