| 摘要 |
PURPOSE:To smoothen the transfer, etc., of data through a memory by operating a write cycle with priority when a write requesting signal and a read reqesting signal are simultaneously inputted. CONSTITUTION:When a read requesting signal 20 and a write requesting signal 10 are simultaneously received, a memory starting circuit 500 is operated so as to process a write requesting signal 10 with a priority. Not at the time of an empty state but at the time of the final state of a read cycle or a write cycle, a memory control circuit 400 outputs a memory starting activating signal 405, investigates the presence and absence of the request of the next cycle and executes the processing equivalent to the reservation. Thus, the read requesting signal 20 and the write requesting signal 10 inputted simultaneously or continuously can be processed without inserting the empty state and the memory can be efficiently used.
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