| 摘要 |
PURPOSE:To reduce the increase and the complication of the quantity for processing by optionally demarcating the high order bit and the low order bit on address pointer. CONSTITUTION:The data for demarcating the high order and the low order of the address pointer 1 is stored in a register 7. A control circuit 6 designates the operation of a selection circuit 2 according to the contents of the register 7. In regard to address pointer 1 demarcated by the selection circuit 2, the low order is logically operated with the operation of inclement and declement by the output of an INC/DEC command instruction circuit 4 and the high order with the contents of a register 5 by a modifying circuit 3.
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