发明名称 RECEPTION ELECTRIC FIELD DETECTION CIRCUIT
摘要 PURPOSE:To decrease number of bits of an A/D converter and to lower the power supply voltage and also to decrease the current consumption by providing a function operating at most one of double balanced differential amplifiers. CONSTITUTION:The number of stages of differential amplifiers constituting an intermediate frequency amplifier is selected as n=4(=2<2>) stages. In selecting each resistance properly, the circuit constitution is 4-stage connection of identical differential amplifiers and double balanced differential amplifiers. In order to realize the differential amplifier and the double balanced differential amplifier, nearly 2.5V is made possible for a power voltage Vcc. Thus, in the circuit constitution in figure, the power supply voltage of Vcc=2.5V is realized. Further, as to the current consumption, when reception electric field information is required and a switch Si (i=1, 2, 3, 4) detecting the reception electric field strength required in the specific dynamic range is selected, one current flowing is enough in the 4 double balanced differential amplifiers and since a current I0 is reduced to 1/4, the current consumption is reduced remarkably.
申请公布号 JPS62151034(A) 申请公布日期 1987.07.06
申请号 JP19850294284 申请日期 1985.12.25
申请人 NEC CORP 发明人 KIMURA KATSUHARU
分类号 H03D1/22;G01R29/08;H04B1/16 主分类号 H03D1/22
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