发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a high dielectric strength IC which has a fine structure and is free from a parasitic MOS by a method wherein a latticed or meshy Al film which is connected to a high potential or a ground potential is formed on a wiring with a layer insulating film in between. CONSTITUTION:On two layers of Al wirings 5 and 6, 3rd layer Al film 11 is formed and patterned to have a lattice-shape with a layer insulating film 7 of PSG or the like in between. Then, by connecting the 3rd layer Al film 11 to a high potential Vcc, Cl<-> ions and Na<+> ions which are contained in a resin mold unit with which the linear IC is molded are trapped by the 3rd Al film 11 and p-type inversion created in the substrate surface between p-type diffused resistors is avoided. It is to be noted that, if the 3rd layer Al film 11 is composed of an all-over solid film, blisters may be created by thermal mismatching between the Al film 11 and the insulating film whose thermal expansion coefficient is small but, by employing the latticed pattern, the blisters can be avoided.
申请公布号 JPS62150742(A) 申请公布日期 1987.07.04
申请号 JP19850290513 申请日期 1985.12.25
申请人 HITACHI LTD 发明人 TAKAGI TATSUTOSHI
分类号 H01L21/76;H01L21/3205;H01L23/52 主分类号 H01L21/76
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