| 摘要 |
PURPOSE:To synchronize a sub code signal by using a count output when a counter means counts a prescribed frame or a signal representing the continuous detection of two period signals as a synchronizing signal for a sub code signal and also for a reset signal of the counter. CONSTITUTION:Even when a false synchronizing signal So or S1 is generated on the way of generation interval of sub code frame synchronizing signals So, S1, a correct sub code synchronizing signal is obtained without the effect of count of a counter 1. A track jump is caused at normal reproduction or access (program search), a track jump is caused this direction, and when sub code data D89-D92 are reproduced duplicatedly, the frame counter 1 counts '97' and no signal SoXS1 is generated, but the counter 1 is reset and an output of a '97' detection circuit 2 is outputted as a sub code frame synchronizing signal. Thus, a correct sub code data and a sub code frame synchronizing signal are obtained.
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