发明名称 PROGRAM ARITHMETIC UNIT
摘要 PURPOSE:To process plural inputs at a time by constituting a logical operation part so that plural lines are processed at a time and providing an instruction code with bit pattern part which corresponds to its line number. CONSTITUTION:Arithmetic instruction codes in use have an instruction code part which controls the logical operation part 15, and an arithmetic bit pattern part which indicates data of data in a line to be processes, and the data of the arithmetic bit pattern part is inputted to a bit pattern register 17. Then, a data of respective lines to be processed are set in a bit accumulator 13' at a time and only data of plural lines specified based on the contents of the bit pattern register 17 among the set data is processed by the logical operation part 15' at a time, so that the result is stored in the bit accumulator 13'. Thus, plural inputs are processed at a time, so the number of steps of instruction is reduced.
申请公布号 JPS62145304(A) 申请公布日期 1987.06.29
申请号 JP19850285425 申请日期 1985.12.20
申请人 FUJI ELECTRIC CO LTD;FUJI FACOM CORP 发明人 ISHIBASHI KEIJI
分类号 G05B19/05;G05B19/02;G06F9/30;G06F9/305;G06F9/308 主分类号 G05B19/05
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