发明名称 MAJORITY DECISION CIRCUIT
摘要 PURPOSE:To reduce remarkably the scale of a circuit by deciding majority decision of 2 binary codes processing it in analog way. CONSTITUTION:Binary codes to be majority-decided supplied to input terminals IN-1-IN-n are supplied to a corresponding inverter of an inversion circuit 1 consisting of (n) units of MOS inverters the same in characteristic, and supplied to the first adder 2 and an inversion circuit 3. The former consists of (n) units of resistors having equal resistance value R, and added through corresponding resistors, and voltage e0 is applied to the terminal (a) of a comparator 5. The latter is the same circuit with the inversion circuit 1, and after inversion, added by the second adder 4 which is the with the first adder, and voltage -e0 is applied to the terminal (b) of the comparator 5.
申请公布号 JPS62142418(A) 申请公布日期 1987.06.25
申请号 JP19850283707 申请日期 1985.12.17
申请人 FUJITSU LTD 发明人 MIYAMOTO BUNICHI
分类号 H03K19/23 主分类号 H03K19/23
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