发明名称 ADDRESS CONTROL CIRCUIT
摘要 PURPOSE:To attain an access at a high speed by using a real address generating circuit which allocates the address values, i.e., the outputs of the X and Y address generating circuits to the address spaces of a real memory, etc. CONSTITUTION:An X address generating circuit 5 calculates the continuous address values including an X direction start address XS through an X direction end address XE. While a Y address generating circuit 6 calculates the addresses including a Y direction start address YS through a Y direction and address YE in the form of the continuous address values with an X direction packing size XSIZE set to a real memory packing size register 8 defined as a step with addition of the XSIZE. Then the address values calculated by both circuits 5 and 6 are allocated to the 1-dimensional address spaces of a real memory, etc., through a real address generating circuit 7. Thus it is possible to calculate the read address value of the real memory, etc., by an adder only. This attains an access at a high speed.
申请公布号 JPS62139057(A) 申请公布日期 1987.06.22
申请号 JP19850280368 申请日期 1985.12.13
申请人 NEC CORP 发明人 SAWADA HACHIRO
分类号 G06F12/00;G06F12/02;G11C7/00;G11C8/00 主分类号 G06F12/00
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