发明名称 MULTIPLE ADDRESS COMMUNICATION EQUIPMENT
摘要 PURPOSE:To reduce the number of bits required for multiple address communication by designating plural nodes having node addresses of n-bit length as destinations of multiple address communication by one extended address of 3n-bit length in a message. CONSTITUTION:In a transmitter and receiver for multiple address communication, the address length of nodes is defined as n-number of bits, and the data length of multiple address communication is defined as m-number of bits. In one message 1 transmitted from the transmitter each of a minimum address 3 and a maximum address 4 is divided into k-number of partial bit strings by an address divider 5. In this case, the section width of each partial string of the maximum address 4 and a corresponding partial string of the minimum address 3, namely, (the value of each partial string of the maximum address 4)-(the value of the corresponding partial string of the minimum address)+1 is always (h). Since the number of messages is one and the message length is (3Xn+m)-number of bits (n<<m), 3Xn+m/h<k>X(n+m) 1/h<k> is true, and the number of bits required for multiple address communication is reduced considerably.
申请公布号 JPS62137941(A) 申请公布日期 1987.06.20
申请号 JP19850279710 申请日期 1985.12.11
申请人 NEC CORP 发明人 SUZUKI SUSUMU
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