发明名称 MEMORY DEVICE
摘要 PURPOSE:To shorten the processing time of an instruction by executing the shift processing of a data extending over two optional continuous addresses, in the course of an access. CONSTITUTION:When there is the instruction of a shift to an address A, an access is executed simultaneously extending over one address of the front or the rear address by the address A shown by an address signal applied to an address register 3, and the instruction contents of the shift. A data extending over two optional continuous addresses is sent to a switching circuit 2. and a data which has executed a shift processing in th course of an access is outputted. Accordingly, by a memory access of once, the write and read-out of a memory 100 can be executed extending over two optional continuous address.
申请公布号 JPS62133544(A) 申请公布日期 1987.06.16
申请号 JP19850273928 申请日期 1985.12.04
申请人 NEC CORP 发明人 NIGO KOEMON
分类号 G06F12/06;G06F12/04 主分类号 G06F12/06
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