| 摘要 |
PURPOSE:To decrease the number of address lines by using an input terminal which receives the address signal of multi-value levels and an A/D converting part which converts the address signal of the multi-value level into the address signal of a binary level and also supplies the address signal of the binary level to a memory. CONSTITUTION:The address signals Bo and Bi of the multi-value levels are supplied to the A/D converting part 5 and converted into binary numbers to be supplied to a memory cell 1. Then data are written to or read out of the addresses designated by the signals Bo and Bi. Thus the number of binary address signal lines supplied to the cell 1 is changed to 8 (16 in all with both signal lines) by the part 5 when the signal line of the input addresses of the Bo, Bi at a 256 value level is used. As a result, the conventional 16 address signal lines can be reduced down to just 2 signals. |
