| 摘要 |
PURPOSE:To improve the efficiency of memory access by holding data on an actual address of a memory in a register when the 1st address is specified by a CPU and accessing the real address indicated by the held data in the register when the 2nd address is specified. CONSTITUTION:The CPU attains access to a memory through which information is interchanged between the CPU and an external device; and an address on the memory 3 to which the CPU attains access is supplied as data to an address register 11 and an address decoder 12 receives an address A and supplies a chip select signal to the register 11, which supplies an address ADR to the memory 3. Then, an address B is received by the address decoder 13 in a next sequence to generate a chip select signal CS, which is supplied to the memory 3 through a selector 1, so that data DATA is read out to a data bus.
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