| 摘要 |
PURPOSE:To obtain an SIT whose forward direction voltage drop is small and switching speed is extremely high, by making a first gate and a second gate in a plane structure and a buried structure respectively, and drawing out both of the gate electrodes from the single surface of an Si substrate. CONSTITUTION:On the (111) face of a P<+> Si substrate 10, a P-epitaxial layer 11 of specified thickness is laminated, which is subjected to a selective ion implantation and annealing to make a second gate layer 12 of N<+> type. This is buried under an N<-> eptaxial layer 14 on which an SiO2 mask 16 is formed to diffuse B, and a first gate layer 15 of P<+> type is formed with a specified spacing and depth. Apertures are formed selectively, and a shallow N<+> layer 17 is formed from a P-added poly Si layer 18. Apertures are made on the P<+> layer 15, and the N<+> layer 12 is exposed by an etching in which an Si3N4 mask 19 is applied. P ion is implanted in the N<+> layer where an Al mask 20 is applied. The masks 19 and 20 are eliminated, and Al deposition electrodes 21-24 are formed. The injection of electrons and position holes is increased by the forward bias voltage of the two gate electrodes, so that the ON voltage is decreased and the rapid OFF state without tailing can be obtained by a reverse bias voltage. Thus the electric potential of both gates can be made high simultane ously, so that carrier injection is rapidly blocked and a high current gain is obtained. |
