Semiconductor integrated circuit device with test circuit.

摘要

A semiconductor integrated circuit device with a test circuit including : a plurality of basic gate cells (Gi) arranged in a matrix ; wiring connected between the basic gate cells and arranged so as to constitute a logic circuit ; and a test circuit for checking an operation state of each gate cell and a connection state between basic gate cells. The test circuit comprises : a test input section having a plurality of row selection wires (Sci, Scn) provided along the basic gate cells in a row direction, a plurality of column selection wires (Sli, Sln) provided along the basic gate cells in a column di­rection, and an access circuit (Ali) connected to an in­put portion of the basic gate cell for applying an input signal to the basic gate cell optionally selected by the row and column selection wires ; and a test detection section having a plurality of monitor wires ; and a test detection section having a plurality of monitor wires (Mi, Mn) provided along the basic gate cells in the row direction and a switching element (DI) connected between the basic gate cell (Gi) and the monitor wire (Mi).