发明名称 Sense circuit with presetting means
摘要 A circuit whose output is asymmetrical whereby the circuit makes a transition from a first state to a second state more slowly than from the second state to the first state a preset towards the second state prior to the application of data input signals to the circuit.
申请公布号 US4668881(A) 申请公布日期 1987.05.26
申请号 US19830556932 申请日期 1983.12.01
申请人 RCA CORPORATION 发明人 PIASECKI, DOUGLAS S.
分类号 H03K3/286;H03K3/2885;(IPC1-7):H03K5/153;H03K3/033;H03K3/295 主分类号 H03K3/286
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