发明名称 CHANNEL CONTROL CIRCUIT
摘要 PURPOSE:To attain rapid data transfer by using a direct memory access (DMA) controller, and transferring data to a data register word by word without using a program. CONSTITUTION:Data inputted from an external interface circuit 3 are stored in a large capacity internal memory 2 every input. To output data asynchronously to an external I/O device 12, the idle state of a rapid memory 7 is checked, the DMA controller 10 is started and then data are written from the internal memory 2 to the data register 8 word by word. The data are outputted to a data bus for a rapid memory 7. The initial value of a counter 6 is '0' and the value is counted up in accordance with the writing of data in the memory 7. The DMA controller 10 reads out the succeeding data from the internal memory 2 and said operation is repeated by the prescribed number of times. During the repeat of the operation, a program in an internal CPU 1 is not surely used.
申请公布号 JPS62111343(A) 申请公布日期 1987.05.22
申请号 JP19850251036 申请日期 1985.11.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOKOTA KAZUYUKI
分类号 H04L29/10;G06F13/12;H04L13/00 主分类号 H04L29/10
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