Error corrector for a linear feedback shift register sequence

摘要

Disclosed is an error corrector for a linear feedback shift register sequence employing an open loop linear feedback shift register (LFSR) having selected bits "tapped" and combined to form a feedback signal. The taps implement an orthogonal convolutional code that is inherently redundant, therefore, the transmission of parity bits is not required. The feedback signal is combined with the received synchronization signal to form an error estimate that is temporarily stored in a syndrome register. By majority voting a selected outputs of the syndrome register a reliable determination of a received error can be made. Once an error determination is made, a correction signal is generated to correct the bit in error thereby providing a high probability of initiating and maintaining synchronization.