| 摘要 |
PURPOSE:To reduce a junction capacitance and improve device characteristics by a method wherein two polycrystalline silicon layers are formed and lead electrodes with side walls are formed for source-drain layers by reactive ion etching. CONSTITUTION:An oxide film 2 and a nitride film 3 for selective oxidization are formed on a silicon substrate 1. The nitride film 3 is removed except the part on an active region 4 and field oxide films 5 are formed by heat oxidization. The remaining nitride film 3 is removed and the 1st polycrystalline silicon layer 6 and an insulating film 7 are successively formed. The insulating film 7 and a 1st polycrystalline silicon layer 6 are removed except the arts where lead electrodes are formed and the lead electrodes 61 are formed. A 2nd polycrystalline silicon layer is formed over the whole surface and an impurity is introduced. The 2nd polycrystalline silicon layer is removed to form side walls 81. A gate oxide film 9 and source-drain layers 10 are formed by oxidization. A gate electrode 11 is formed and a layer insulating film 12 is applied and electrode lead aperture 13 are drilled to form source-drain electrodes.
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