发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve the operation margin of a differential inverter by inputting the outputs of two cascaded inverters as a positive and a negative phase input to a differential circuit used which is used as an output circuit conventionally as to a very high speed integrated circuit device formed on a semi-insulating potassium arsenide substrate. CONSTITUTION:In the logical integrated circuit device composed of a Schottky junction type field effect transistor (FET), an output circuit is provided with the 1st inverter 2, the 2nd inverter 8 which inputs its output, and the differential inverter which inputs the outputs of the 1st and the 2nd inverters 2 and 8 in positive phase an negative phase respectively. The output differential inverter is driven in both positive and negative phase states, so the small signal voltage gain is improved by twice as large as that of a conventional circuit which uses a DC reference voltage input. For example, the source voltage (between 10 and 11) is lowered to 2-2.5V to secure a 0.5V output amplitude and when the threshold voltage of transistors 3 and 4 is set to about -0.5V so as to secure internal logical gate speed characteristics, a proper margin is obtained by this circuit constitution.
申请公布号 JPS62104312(A) 申请公布日期 1987.05.14
申请号 JP19850245394 申请日期 1985.10.31
申请人 NEC CORP 发明人 HIRAYAMA HIROMITSU
分类号 H03K19/0175;H01L21/8222;H01L27/082;H01L27/095;H03K19/094;H03K19/0952 主分类号 H03K19/0175
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